首页> 外国专利> Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods

Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods

机译:用于使用P型场效应晶体管(PFET)写入端口的存储位单元的字线负升压写入辅助电路以及相关系统和方法

摘要

Write-assist circuits for memory bit cells (“bit cells”) employing a P-type Field-Effect transistor (PFET) write port(s) are disclosed. Related methods and systems are also disclosed. It has been observed that as node technology is scaled down in size, PFET drive current (i.e., drive strength) exceeds N-type Field-Effect transistor (NFET) drive current for like-dimensioned FETs. In this regard, in one aspect, it is desired to provide bit cells having PFET write ports, as opposed to NFET write ports, to reduce memory write times to the bit cells, and thus improve memory performance. To mitigate a write contention that could otherwise occur when writing data to bit cells, a write-assist circuit provided in the form of negative wordline boost circuit can be employed to strengthen a PFET access transistor in a memory bit cell having a PFET write port(s).
机译:公开了用于采用P型场效应晶体管(PFET)写端口的存储位单元(“位单元”)的写辅助电路。还公开了相关的方法和系统。已经观察到,随着节点技术的尺寸缩小,PFET驱动电流(即,驱动强度)超过了尺寸相同的FET的N型场效应晶体管(NFET)驱动电流。就这一点而言,一方面,期望提供具有与NFET写端口相对的PFET写端口的位单元,以减少对位单元的存储器写时间,从而提高存储器性能。为了减轻将数据写入位单元时可能发生的写入争用,可以采用以负字线升压电路形式提供的写辅助电路来增强具有PFET写端口的存储位单元中的PFET访问晶体管。 s)。

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