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POST-PACKAGING REPAIR OF REDUNDANT ROWS

机译:冗余行的打包后修复

摘要

Systems and methods to perform post-packaging repair of previously repaired data groups are disclosed. The devices may have an array of addressable rows or columns of memory cells, which can be activated. Upon identification of defect in a memory cell row or column, a repair in which the memory cell may be deactivated and a secondary row may be activated in its place may be performed. Volatile and non-volatile storage elements may be used to store the defective memory addresses. Logic circuitry in the device may match a requested address with the stored addresses and generate logic signals that trigger activation of a repaired row in place of the defective row or column. Moreover, defective rows or columns that have been previously repaired once may be further repaired. To that end, logic circuitry implementing a trumping mechanism may be used to prevent activation of multiple data rows or columns for addresses that were repaired multiple times.
机译:公开了执行先前修复的数据组的打包后修复的系统和方法。设备可以具有可激活的存储器单元的可寻址行或列的阵列。一旦识别出存储单元行或列中的缺陷,就可以执行修复,在该修复中可以停用存储单元并且可以在其位置激活第二行。易失性和非易失性存储元件可以用于存储有缺陷的存储器地址。设备中的逻辑电路可以将请求的地址与存储的地址进行匹配,并生成逻辑信号来触发激活修复的行来代替有缺陷的行或列。而且,先前已经被修复一次的有缺陷的行或列可以被进一步修复。为此,实现王牌机制的逻辑电路可用于防止激活多次修复的地址的多个数据行或列。

著录项

  • 公开/公告号US2019333601A1

    专利类型

  • 公开/公告日2019-10-31

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号US201916505271

  • 发明设计人 ALAN J. WILSON;JOHN E. RILEY;

    申请日2019-07-08

  • 分类号G11C29;G11C17/18;G11C17/16;

  • 国家 US

  • 入库时间 2022-08-21 12:09:21

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