In an embodiment, a non-volatile memory device includes a memory array divided into a plurality of tiles, and a row decoder that includes main row decoding units associated to a respective group of tiles. The row decoded further includes local row decoding units, each associated to a respective tile for carrying out selection and biasing of corresponding word lines based on decoded address signals and biasing signals. Each local row decoding unit has logic-combination modules coupled to a set of word lines and include, for each word line, a pull-down stage for selecting a word line, and a pull-up stage. The pull-up stage is dynamically biased, alternatively, in a strong-biasing condition towards a tile-supply voltage when the word line is not selected, or in a weak-biasing condition when the word line is selected.
展开▼
