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COMPETITIVE MACHINE LEARNING ACCURACY ON NEUROMORPHIC ARRAYS WITH CAPACITOR MEMORY DEVICES
COMPETITIVE MACHINE LEARNING ACCURACY ON NEUROMORPHIC ARRAYS WITH CAPACITOR MEMORY DEVICES
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机译:带有电容存储器的神经形态阵列的竞争性机器学习准确性
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摘要
Optimized synapses for neuromorphic arrays are provided. In various embodiments, first and second single-transistor current sources are electrically connected in series. The first single-transistor current source is electrically coupled to both a first control circuit and second control circuit, free of any intervening logic gate between the first single-transistor current source and either one of the control circuits. The second single-transistor current source is electrically coupled to both the first control circuit and the second control circuit, free of any intervening logic gate between the second single-transistor current source and either one of the control circuits. A capacitor is electrically coupled to the first and second single-transistor current sources. A read circuit is electrically coupled to the capacitor. The first and second single-transistor current sources are adapted to charge the capacitor only when concurrently receiving a control signal from both the first and second control circuits. The first and second single- transistor current sources are adapted to discharge the capacitor only when concurrently receiving another control signal from both the first and second control circuit.
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