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ZERO-MISALIGNMENT TWO-VIA STRUCTURES USING PHOTOIMAGEABLE DIELECTRIC, BUILDUP FILM, AND ELECTROLYTIC PLATING
ZERO-MISALIGNMENT TWO-VIA STRUCTURES USING PHOTOIMAGEABLE DIELECTRIC, BUILDUP FILM, AND ELECTROLYTIC PLATING
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机译:使用可光电成像的介电膜,组装膜和电解镀膜实现零失误的两种结构
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摘要
A device package and a method of forming a device package are described. The device package includes a dielectric on a conductive pad, and a first via on a first seed on a top surface of the conductive pad. The device package further includes a conductive trace on the dielectric, and a second via on a second seed layer on the dielectric. The conductive trace connects to the first via and the second via, where the second via connects to an edge of the conductive trace opposite from the first via. The dielectric may include a photoimageable dielectric or a buildup film. The device package may also include a seed on the dielectric prior to the conductive trace on the dielectric, and a second dielectric on the dielectric, the conductive trace, and the first and second vias, where the second dielectric exposes a top surface of the second via.
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