Speculative side-channel hint instruction

摘要

In an apparatus 2 supporting speculative processing of read operations to read data from memory 20-22, a control circuit identifies a speculative side-channel hint instruction in a sequence of instructions to be processed. The hint instruction indicates a risk of information leakage if one subsequent read operation is processed speculatively. The control circuit determines speculative side‑channel mitigation measures based on the hint instruction. This improves upon mitigation measures applied to all operations which unnecessarily sacrifice performance. The control circuit can be decoder 12, execution stage 14, circuitry of data cache 20. Hint instructions, e.g. interpreted as NOP instructions, are inserted at compile or link time, just-in-time (JIT) compilation or dynamic recompilation, by hardware profiling. Hint instructions indicate that subsequent read operations are safe or unsafe to be processed speculatively. Control circuit annotates cached instruction or micro‑operations in 6, 8 based on the presence of hint instructions in the sequence.