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JTL-based superconducting logic arrays and FPGAS

机译:基于JTL的超导逻辑阵列和FPGAS

摘要

Superconducting logic arrays (SLAs) and field-programmable gate arrays (FPGAs) that are based on Josephson transmission lines (JTLs) accommodate reciprocal quantum logic (RQL) compliant binary input signals and provide RQL-compliant output signals that are evaluations of generalized logic functions. Each JTL-based superconducting FPGA (JTLBSFPGA) incorporates multiple JTL-based SLAs (JTLBSLAs) connected together. Each JTLBSLA includes an array of software-programmable and/or mask-programmed logic cells that output products of inputs and cell states, such that the JTLBSLAs output evaluations of sum-of-products functions. New JTLBSLA logic cells are described, including some that provide programmable cell states via magnetic Josephson junctions (MJJs). JTLBSFPGAs provide area efficiency and clock speed advantages over CMOS FPGAs. Unlike SLAs based on Josephson magnetic random access memory (JMRAM), JTLBSLAs do not require word line drivers, flux pumps, or sense amplifiers. Because JTLBSLAs and JTLBSFPGAs are RQL-compliant, they can also include RQL gates connected within or between them, without signal conversion circuitry.
机译:基于约瑟夫森传输线(JTL)的超导逻辑阵列(SLA)和现场可编程门阵列(FPGA)容纳符合互惠量子逻辑(RQL)的二进制输入信号,并提供符合RQL的输出信号,这些信号是对通用逻辑功能的评估。每个基于JTL的超导FPGA(JTLBSFPGA)都包含多个连接在一起的基于JTL的SLA(JTLBSLA)。每个JTLBSLA都包括一组软件可编程和/或掩码编程的逻辑单元,这些逻辑单元输出输入和单元状态的乘积,从而JTLBSLA输出乘积和功能的评估。描述了新的JTLBSLA逻辑单元,包括一些通过磁性约瑟夫森结(MJJ)提供可编程单元状态的逻辑单元。与CMOS FPGA相比,JTLBSFPGA具有面积效率和时钟速度方面的优势。与基于约瑟夫森磁性随机存取存储器(JMRAM)的SLA不同,JTLBSLA不需要字线驱动器,磁通泵或读出放大器。由于JTLBSLA和JTLBSFPGA符合RQL,因此它们还可以包括连接在它们之间或之间的RQL门,而无需信号转换电路。

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