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Accessing error statistics from DRAM memories having integrated error correction
Accessing error statistics from DRAM memories having integrated error correction
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机译:从具有集成纠错功能的DRAM存储器访问错误统计信息
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摘要
In described examples, a memory module includes a memory array with a primary access port coupled to the memory array. Error correction logic is coupled to the memory array. A statistics register is coupled to the error correction logic. A secondary access port is coupled to the statistics register to allow access to the statistics register by an external device without using the primary interface.
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