首页> 外国专利> Three-dimensional memory device containing drain select isolation structures and on-pitch channels and methods of making the same without an etch stop layer

Three-dimensional memory device containing drain select isolation structures and on-pitch channels and methods of making the same without an etch stop layer

机译:包含漏极选择隔离结构和间距沟道的三维存储器件及其制造方法,无需蚀刻停止层

摘要

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory opening fill structures located in the memory openings and including a respective memory-level semiconductor channel and a respective memory film. Drain-select-level gate electrodes overlie the alternating stack. Drain-select-level pillar structures extend through a respective one of the drain-select-level gate electrodes. Each drain-select-level semiconductor channel is electrically connected to an underlying one of the memory-level semiconductor channels. A planar insulating spacer layer having a homogeneous composition throughout directly contacts top surfaces of the memory films and bottom surfaces of the drain-select-level gate electrodes.
机译:一种三维存储装置,包括:位于衬底上方的绝缘层和导电层的交替堆叠;垂直延伸穿过该交替堆叠的存储开口;以及位于所述存储开口中并包括各自的存储级半导体通道的存储开口填充结构。和相应的存储膜。漏极选择级栅电极覆盖交替堆叠。漏极选择级柱状结构延伸穿过各自的漏极选择级栅电极之一。每个漏极选择级半导体通道电连接到下面的存储器级半导体通道之一。整体上具有均质成分的平面绝缘间隔物层直接接触存储膜的顶表面和漏极选择级栅电极的底表面。

著录项

  • 公开/公告号US10553599B1

    专利类型

  • 公开/公告日2020-02-04

    原文格式PDF

  • 申请/专利权人 SANDISK TECHNOLOGIES LLC;

    申请/专利号US201816142875

  • 发明设计人 ZHEN CHEN;MICHIAKI SANO;MITSUTERU MUSHIGA;

    申请日2018-09-26

  • 分类号H01L27/11556;H01L27/11524;H01L27/11519;H01L27/1157;H01L27/11582;H01L21/768;H01L27/11565;H01L21/311;

  • 国家 US

  • 入库时间 2022-08-21 11:24:44

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