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HARDMASK STRESS, GRAIN, AND STRUCTURE ENGINEERING FOR ADVANCED MEMORY APPLICATIONS
HARDMASK STRESS, GRAIN, AND STRUCTURE ENGINEERING FOR ADVANCED MEMORY APPLICATIONS
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机译:先进内存应用的哈德马克应力,晶粒和结构工程
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摘要
A method for manufacturing a semiconductor device includes forming one or more memory device layers over a contact structure. In the method, a plurality of hardmask layers are deposited on the one or more memory device layers in a stacked configuration. Alternating hardmask layers of the stacked configuration are different from each other in at least one respect. The method further includes patterning the plurality of hardmask layers and the one or more memory device layers into a pillar over the contact structure.
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