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SHARED CONTACT TRENCH COMPRISING DUAL SILICIDE LAYERS AND DUAL EPITAXIAL LAYERS FOR SOURCE/DRAIN LAYERS OF NFET AND PFET DEVICES
SHARED CONTACT TRENCH COMPRISING DUAL SILICIDE LAYERS AND DUAL EPITAXIAL LAYERS FOR SOURCE/DRAIN LAYERS OF NFET AND PFET DEVICES
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机译:NFET和PFET器件的源极/漏极层包括双硅化物层和双环氧层的共享接触沟槽
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摘要
Devices and methods are provided for fabricating shared contact trenches for source/drain layers of n-type and p-type field-effect transistor devices, wherein the shared contact trenches include dual silicide layers and dual epitaxial layers. For example, a semiconductor device includes first and second field-effect transistor devices having respective first and second source/drain layers, and a shared contact trench, wherein the first and second source/drain layers are disposed adjacent to each other within the shared contact trench, and are commonly connected to each other by the shared contact trench. The shared contact trench includes a first silicide contact layer disposed on the first source/drain layer, and a second silicide contact layer disposed on the second source/drain layer, wherein the first and second silicide contact layers comprise different silicide materials, and a metallic fill layer disposed on the first and second silicide contact layers.
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