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CORE FILL TO REDUCE DISHING AND METAL PILLAR FILL TO INCREASE METAL DENSITY OF INTERCONNECTS
CORE FILL TO REDUCE DISHING AND METAL PILLAR FILL TO INCREASE METAL DENSITY OF INTERCONNECTS
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机译:减少填充的芯填充和增加互连的金属密度的金属支柱填充
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摘要
An integrated circuit structure comprises a first and second conductive structures formed in an interlayer dielectric (ILD) of a metallization stack over a substrate. The first conductive structure comprises a first conductive line, and first dummy structures located adjacent to one or more sides of the first conductive line, wherein the first dummy structures comprise respective arrays of dielectric core segments having a Young's modulus larger than the Young's modulus of the ILD, the dielectric core segments being approximately 1-3 microns in width and spaced apart by approximately 1-3 microns. The second conductive structure formed in the ILD comprises a conductive surface and second dummy structures formed in the conductive surface, where the second dummy structures comprising an array of conductive pillars.
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