MASKLESS TOP SOURCE/DRAIN EPITAXIAL GROWTH ON VERTICAL TRANSPORT FIELD EFFECT TRANSISTOR

摘要

A method for fabricating a vertical transistor device includes forming a first plurality of fins in a first device region and a second plurality of fins in a second device region on a substrate. The first plurality of fins have a SiGe portion exposed above a top surface of the first region and a portion of the second plurality of fins are exposed above a top surface of the second region. The method further includes depositing a first GeO₂ layer on the top surface of the device and over the exposed SiGe portion of the first plurality of fins and the exposed portion of the second plurality of fins.