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MAPPING SOFTWARE CONSTRUCTS TO SYNCHRONOUS DIGITAL CIRCUITS THAT DO NOT DEADLOCK
MAPPING SOFTWARE CONSTRUCTS TO SYNCHRONOUS DIGITAL CIRCUITS THAT DO NOT DEADLOCK
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机译:映射软件构造为同步的数字电路,但不会解除锁定
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摘要
A disclosed language includes a loop construct that maps to a circuit implementation. The circuit implementation may be used to design or program a synchronous digital circuit. The circuit implementation includes a hardware pipeline that implements the loop's body and condition. The circuit implementation also includes hardware first-in-first-out queues that marshal threads (i.e. collections of local variables) into, around, and out of the pipeline. A pipeline policy circuit limits the number of threads allowed within the pipeline to the capacity of the queue.
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