1T1D DRAM DRAM 1T1D DRAM CELL AND ACCESS METHOD AND ASSOCIATED DEVICE FOR DRAM

摘要

A complementary metal-oxide-semiconductor (CMOS) process technology is used to implement a static random-access memory (SRAM) with 6 transistors. Thereafter, the number of transistors is reduced to increase the integration density, but this may weaken the stability of the memory, increase the complexity of the access circuit, and thus increase the power consumption. In order to increase the integration density of the SRAM, a memory having low power consumption and a circuit corresponding thereto are designed according to electrical characteristics of a reduced number of transistors, thereby implementing an access system. When electrical characteristics of various other memories are similar to the SRAM as in a dynamic random-access memory (DRAM), a corresponding access circuit of the SRAM may be used.