L2 - CPU MULTI-CORE CPU SYSTEM FOR ADJUSTING L2 CACHE CHARACTER METHOD THEREOF AND DEVICES HAVING THE SAME

摘要

The multi-core CPU system includes a shared L2 cache, an access control logic circuit, cores each accessing the shared L2 cache through the access control logic circuit, and an indication signal indicating the number of operating cores among the cores. In response to, a size control circuit for adjusting the size of the shared L2 cache.