Technologies for integrated self-testing of a memory array using error detection and correction code knowledge include identifying data errors between pseudo-random data written to the memory array and the data being read from the memory array, and ignoring data errors determined to be correctable. The data errors can be determined to be correctable if an error correction circuit can correct these errors or if the number of errors per memory piece is less than a number of errors that can be corrected by the error correction circuit.
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