首页> 外国专利> NEW CORELESS ARCHITECTURE AND PROCESSING STRATEGY FOR EMIB-BASED SUBSTRATES WITH HIGH ACCURACY AND HIGH DENSITY

NEW CORELESS ARCHITECTURE AND PROCESSING STRATEGY FOR EMIB-BASED SUBSTRATES WITH HIGH ACCURACY AND HIGH DENSITY

机译:高精确度和高密度的基于EMIB的基体的新的协调架构和处理策略

摘要

Embodiments include semiconductor packages and a method for forming the semiconductor packages. A semiconductor package includes a plurality of conductive layers over a package substrate. The conductive layers include a first conductive layer and first level interconnects (FLIs) in the package substrate. The semiconductor package also includes a solder resist surrounding the FLIs, wherein the solder resist has a top surface that is substantially coplanar with top surfaces of the FLIs, a bridge that is directly coupled to the first conductive layer with solder bumps, the first conductive layer is coupled to the FLIs, and a dielectric over the conductive layers, bridge, and solder resist of the package substrate. The bridge can be an embedded multi-die connection bridge (EMIB). The first conductive layer can include first conductive pads and second conductive pads. The FLIs can include first conductive vias, second conductive vias, diffusion layers, and third conductive pads.
机译:实施例包括半导体封装以及用于形成半导体封装的方法。半导体封装件包括在封装件衬底上方的多个导电层。导电层包括在封装基板中的第一导电层和第一级互连(FLI)。半导体封装还包括围绕FLI的阻焊剂,其中阻焊剂具有与FLI的顶表面基本共面的顶表面,通过焊料凸点直接耦合到第一导电层的桥,第一导电层耦合到FLI,并在封装衬底的导电层,桥接和阻焊剂上形成电介质。该桥可以是嵌入式多管芯连接桥(EMIB)。第一导电层可以包括第一导电垫和第二导电垫。 FLI可以包括第一导电通孔,第二导电通孔,扩散层和第三导电焊盘。

著录项

  • 公开/公告号DE102020106782A1

    专利类型

  • 公开/公告日2020-10-22

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号DE202010106782

  • 申请日2020-03-12

  • 分类号H01L23/50;H01L21/60;H01L25/065;

  • 国家 DE

  • 入库时间 2022-08-21 11:01:08

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