VERBESSERTES HERSTELLUNGSVERFAHREN EINES INTEGRIERTEN SCHALTKREISES, DER EINEN NMOS- UND EINEN PMOS-TRANSISTOR UMFASST

摘要

The invention relates to a method for manufacturing an integrated circuit (1), comprising the steps of: - providing a substrate (11) having layers of silicon (13), insulation (12), and hard mask (14), accesses to first and second zones (151, 152) of the silicon layer (13); - forming first and second deposits (17, 18) of SiGe alloy on the first and second zones for forming first and second stacks; then-protect the first deposit (17) and maintain access to the second deposit; then perform etching to form grooves (61, 62) between the hard mask (14) and two opposite edges of the second stack; then forming a layer of tension-constrained silicon (139) in the second zone by amorphization of the second zone; then crystallization; -enrich the first zone (151) in Germanium by diffusion from the first deposit (17).