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Jitter and Wander Reduction for a SONET DS3 Desynchronizer Using Predictive Fuzzy Control

机译:使用预测模糊控制的sONET Ds3去同步器的抖动和漂移减少

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摘要

Excessive high-frequency jitter or low-frequency wander can create problems within synchronous transmission systems and must be kept within limits to ensure reliable network operation. The emerging Synchronous Optical NETwork (SONET) introduces additional challenges for jitter and wander attenuation equipment (called desynchronizers) when used to carry payloads from the existing Plesiochronous Digital Hierarchy (PDH), such as the DS3. The difficulty is primarily due to the large phase transients resulting from the pointer-based justification technique employed by SONET (called Pointer Justification Events or PJEs). While some previous desynchronization techniques consider the buffer level in their control actions, none has explicitly considered wander generation. Instead, compliance with jitter, wander, and buffer-size constraints have typically been met implicitly--through testing and tuning of the Phase Locked Loop (PLL) controller. We investigated a fuzzy/rule-based solution to this desynchronization/constraint-satisfaction problem. But rather than mapping the input state to an action, as is done in standard fuzzy logic, our controller maps a state and a candidate action to a desired result. In other words, this control paradigm employs prediction to evaluate which of a set of candidate actions would result in the u22bestu22 predicted performance. Before the controller could predict an actionu27s affect on buffer and wander levels, appropriate models were required. The model of the buffer is simply the integral of the frequency difference between the input and output of the PLL, and a novel MTIE Constraint Envelope technique was developed to evaluate future wander performance. We show that a predictive knowledge-based controller is capable of achieving the following three objectives: (1) Reduce jitter implicitly by avoiding unnecessary frequency changes such that the jitter limits specified in relevant standards are met, (2) Explicitly satisfy both buffer-level and wander (MTIE) constraints by trading off performance in one to meet the hard limit of the other, (3) When both buffer-level and wander constraints are in danger of violation and cannot be satisfied simultaneously, maintain the preferred constraint by sacrificing the other. We also show that the computation required for this control algorithm is easily within the reach of modern microprocessors.
机译:过多的高频抖动或低频漂移会在同步传输系统中造成问题,并且必须保持在限制范围内,以确保可靠的网络运行。新兴的同步光网络(SONET)在用于承载现有的准同步数字体系(PDH)(例如DS3)的有效载荷时,对抖动和漂移衰减设备(称为去同步器)提出了新的挑战。困难主要是由于SONET所采用的基于指针的对齐技术(称为指针对齐事件或PJE)导致了较大的相位瞬变。尽管一些先前的不同步技术在其控制动作中考虑了缓冲区级别,但没有一个技术明确考虑漂移产生。取而代之的是,通常通过测试和调整锁相环(PLL)控制器来隐式地满足抖动,漂移和缓冲区大小约束的要求。我们研究了基于模糊/规则的解同步/约束满足问题。但是,我们的控制器不是像标准模糊逻辑那样将输入状态映射到动作,而是将状态和候选动作映射到所需结果。换句话说,此控制范式采用预测来评估一组候选动作中的哪一个会导致预测性能。在控制器可以预测动作对缓冲区和漂移水平的影响之前,需要适当的模型。缓冲器的模型只是PLL输入和输出之间频率差的积分,因此开发了一种新颖的MTIE约束包络技术来评估未来的漂移性能。我们表明,基于知识的预测控制器能够实现以下三个目标:(1)通过避免不必要的频率变化来隐式降低抖动,从而满足相关标准中指定的抖动限制;(2)明确地满足两个缓冲器级别(3)当缓冲区级别和漂移约束都处于违反风险且无法同时满足时,通过牺牲性能来维持首选约束。其他。我们还表明,此控制算法所需的计算很容易在现代微处理器的范围内完成。

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    Stanton Kevin Blythe;

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  • 年度 1996
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