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Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

机译:可重构光子片上网络的周期精确评估

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摘要

There is little doubt that the most important limiting factors of the performance of next-generation Chip Multiprocessors (CMPs) will be the power efficiency and the available communication speed between cores. Photonic Networks-on-Chip (NoCs) have been suggested as a viable route to relieve the off- and on-chip interconnection bottleneck. Low-loss integrated optical waveguides can transport very high-speed data signals over longer distances as compared to on-chip electrical signaling. In addition, with the development of silicon microrings, photonic switches can be integrated to route signals in a data-transparent way. Although several photonic NoC proposals exist, their use is often limited to the communication of large data messages due to a relatively long set-up time of the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically (on a microsecond scale) to the evolving traffic situation by use of silicon microrings. To evaluate this system's performance, the proposed architecture has been implemented in a detailed full-system cycle-accurate simulator which is capable of generating realistic workloads and traffic patterns. In addition, a model was developed to estimate the power consumption of the full interconnection network which was compared with other photonic and electrical NoC solutions. We find that our proposed network architecture significantly lowers the average memory access latency (35% reduction) while only generating a modest increase in power consumption (20%), compared to a conventional concentrated mesh electrical signaling approach. When comparing our solution to high-speed circuit-switched photonic NoCs, long photonic channel set-up times can be tolerated which makes our approach directly applicable to current shared-memory CMPs.
机译:毫无疑问,下一代芯片多处理器(CMP)性能的最重要限制因素将是功率效率和内核之间的可用通信速度。已经提出了片上光子网络(NoC)作为缓解片外和片上互连瓶颈的可行途径。与片上电信号传输相比,低损耗集成光波导可以在更长的距离上传输超高速数据信号。此外,随着硅微环的发展,可以集成光子开关以数据透明的方式路由信号。尽管存在几种光子NoC建议,但由于光子通道的建立时间相对较长,它们的使用通常仅限于大数据消息的通信。在这项工作中,我们评估了一种可重配置的光子NoC,其中通过使用硅微环自动将拓扑结构(以微秒为单位)适应不断变化的交通状况。为了评估该系统的性能,已在详细的全系统周期精确模拟器中实现了所建议的体系结构,该模拟器能够生成实际的工作负载和流量模式。此外,还开发了一个模型来估算完整互连网络的功耗,并将其与其他光子和电气NoC解决方案进行了比较。我们发现,与传统的集中式网格电信令方法相比,我们提出的网络体系结构显着降低了平均内存访问延迟(减少了35%),而仅产生了适度的功耗增加(20%)。将我们的解决方案与高速电路交换光子NoC进行比较时,可以容忍较长的光子通道建立时间,这使我们的方法直接适用于当前的共享内存CMP。

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