Scaling conventional floating gate Flash memory faces extremely difficult challenges today. Novel structures in both the gate stack and channel have been adopted for better scalability while maintaining memory performance. Gate stack designs with discrete-charge storage such as nanocyrstal (NC) memory have demonstrated significant enhancement in retention to programming time (tR / tPE) ratio at low program/erase (P/E) voltages and superior cycling lifetime. A 3D finite-element method (FEM) simulation was performed to assess the bit-error-rate (BER) due to the non-uniformity in NC size, position, and density distribution below the 30nm technology node. To address the parametric variation for discrete-charge storage, hybrid approaches with integration of organic molecules, atomic-layer-deposited oxide, and solution-based processes offer better uniform charging capability by utilizing the bottom-up self-assembly method and the monodispersion nature of the molecules. We investigated barriers with thermally and electrically stable redox-active ferrocine (Fc) and cobalt-porphyrin (CoP) as well as alkyl-chain molecules in a well-studied metaloxide-semiconductor (MOS) structure to better understand the charge storage, dielectric and interface properties of the molecular layers. For charge storage, the density of CoP can be readily controlled to achieve three distinguishable memory states in a single cell at room-temperature. In addition, we employed CoP as a resonant tunneling barrier (RTB) that further extends the retention-to-program time ratio and cycling lifetime. Hybrid solution-based layer-by- layer (LBL) deposition methods are demonstrated with various functional ends of the benzyl and alkyl molecules to create large area, electrically robust molecular junctions and insulation. Our approach provides a practical and promising way for the design and fabrication of silicon-based or all-organic nonvolatile memories.
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