Caractérisation et modélisation d'interconnexions. Développement de nouvelles solutions pour la transmission d'informations au sein des cartes et puces électroniques.

摘要

Since the first IC in 1959 the performances and computing capacity of electronic devices have always grown, following thus the well-known empirical Moore’s law which says that the number of transistors in a dense integrated circuit doubles approximately every 18 months. This prevision is still verified even if some limitations appears like for example the limitation of the clock frequency which grow less than the projection that the ITRS (International Technology Roadmap for Semiconductors) has made in 2000. One of the stumbling point comes from interconnects which ensure the transmission of information inside electronic chips or cards. The interconnects imply delay, signal distortion, crosstalk and power dissipation and they now must be taken into account during electronic device design. So the researches depicted in this manuscript deal with the modelling of interconnect and study of new solutions to overcome problems due to classical interconnects. These works have been realized in Lab-STICC laboratory with the help of colleagues, post-doc, PhDs and Master Students. The manuscript include three chapters, the first one concerns researches on modelling aspects, the second is about alternative solutions to classical wired interconnects and to conclude the research projects for the next years are presented.The first chapter concern researches about modelling which aim to develop reliable models in view to simulate more quickly the electrical behavior of interconnects. Firstly the collaborations concerning the development of model-order reduction are presented. Then with the aim to evaluate the impact of inductive behavior, the current return patch problem and so the extraction of loop inductance is treated. The 3D discontinuities and 3D environment effects are presented in the third part of this chapter. For example the parallel grid influences on propagation are explored as well as the case of coupling between microvias and parallel-plates cavities inside multilayer PCB.The second chapter is about research of new solutions to overcome the limitation due to classical wired interconnects. A review of envisaged alternative solutions like for example optical interconnects and CNT (carbon Nano Tube) is first presented. Then a focus on RF guided interconnect is made and constraints in term of bandwidth are explained and some coupling techniques are explored. These studies naturally lead to exploration of the paradigm of wireless interconnects and the preliminary researches on radio transmission between two circuits placed on a PCB are shown. All these approaches of RF wireless interconnect are prelude to the research projects which are developed in a third chapter of the manuscript.The development of the draft over 4 years is based on the BBC project (wireless interconnect network on chip or in board for Broadcast-Based parallel Computing) funded by the Labex COMINLABS and which will begin in October 2016. The aims of this project are outlined as well as the aims of another project entitled “BROADWAYS” (Broadcast-Based new paradigms of ubiquitous memory mapping, bandwidth allocation and parallel programing made possible by Radio Network On Chip) which is currently in the second step of review by the ANR. To conclude this research part other embryonic researches are presented as well as long term researches envisaged like terahertz applications of the use of graphene for microwave applications.