Data dominated signal processing applications aretypically described using large and multi-dimensional arrays and loop nests. Theorder of production and consumption of array elements in these loop nests hashuge impact on the amount of memory required during execution. This is essentialsince the size and complexity of the memory hierarchy is thedominating factor for power, performance and chip size in these applications.This paper presents a number of guiding principles for the ordering of thedimensions in the loop nests.They enable the designer, or design tools, to find the optimal ordering of loop nestdimensions for individual data dependencies in the code. We prove the validityof the guiding principles when no prior restrictions are given regarding fixationof dimensions. If some dimensions are already fixed atgiven nest levels, this is taken into account when fixing the remaining dimensions.In most cases an optimal ordering is found for this situation as well.The guiding principles can be used in the early design phases inorder to enable minimization of the memory requirement through in-place mapping.We use real life examples toshow how they can be applied to reach a cost optimized end product. The resultsshow orders of magnitude improvement in memory requirement compared to using thedeclared array sizes, and similar penalties for choosing the suboptimalordering of loops when in-place mapping is exploited.
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