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Phase noise and spur reduction in an array of direct digital synthesizers

机译:直接数字合成器阵列中的相位噪声和杂散减少

摘要

Many applications, including communications, test and measurement, and radar, require the generation of signals with a high degree of spectral purity. One method for producing tunable, low-noise source signals is to combine the outputs of multiple direct digital synthesizers (DDSs) arranged in a parallel configuration. In such an approach, if all noise is uncorrelated across channels, the noise will decrease relative to the combined signal power, resulting in a reduction of sideband noise and an increase in SNR. However, in any real array, the broadband noise and spurious components will be correlated to some degree, limiting the gains achieved by parallelization. This thesis examines the potential performance benefits that may arise from using an array of DDSs, with a focus on several types of common DDS errors, including phase noise, phase truncation spurs, quantization noise spurs, and quantizer nonlinearity spurs. Measurements to determine the level of correlation among DDS channels were made on a custom 14-channel DDS testbed. The investigation of the phase noise of a DDS array indicates that the contribution to the phase noise from the DACs can be decreased to a desired level by using a large enough number of channels. In such a system, the phase noise qualities of the source clock and the system cost and complexity will be the main limitations on the phase noise of the DDS array. The study of phase truncation spurs suggests that, at least in our system, the phase truncation spurs are uncorrelated, contrary to the theoretical prediction. We believe this decorrelation is due to the existence of an unidentified mechanism in our DDS array that is unaccounted for in our current operational DDS model. This mechanism, likely due to some timing element in the FPGA, causes some randomness in the relative phases of the truncation spurs from channel to channel each time the DDS array is powered up. This randomness decorrelates the phase truncation spurs, opening the potential for SFDR gain from using a DDS array. The analysis of the correlation of quantization noise spurs in an array of DDSs shows that the total quantization noise power of each DDS channel is uncorrelated for nearly all values of DAC output bits. This suggests that a near N gain in SQNR is possible for an N-channel array of DDSs. This gain will be most apparent for low-bit DACs in which quantization noise is notably higher than the thermal noise contribution. Lastly, the measurements of the correlation of quantizer nonlinearity spurs demonstrate that the second and third harmonics are highly correlated across channels for all frequencies tested. This means that there is no benefit to using an array of DDSs for the problems of in-band quantizer nonlinearities. As a result, alternate methods of harmonic spur management must be employed.
机译:许多应用,包括通信,测试和测量以及雷达,都要求生成具有高频谱纯度的信号。产生可调的,低噪声源信号的一种方法是组合以并行配置布置的多个直接数字合成器(DDS)的输出。在这种方法中,如果所有噪声在通道之间都是不相关的,则噪声将相对于组合信号功率降低,从而导致边带噪声的降低和SNR的提高。但是,在任何实际阵列中,宽带噪声和杂散分量都将在某种程度上相关联,从而限制了并行化所获得的增益。本文研究了使用DDS阵列可能产生的潜在性能优势,重点研究了几种常见的DDS错误,包括相位噪声,相位截断杂散,量化噪声杂散和量化器非线性杂散。在定制的14通道DDS测试平台上进行测量以确定DDS通道之间的相关程度。对DDS阵列的相位噪声的研究表明,通过使用足够多的通道,可以将DAC对相位噪声的影响降低到所需水平。在这样的系统中,源时钟的相位噪声质量以及系统成本和复杂性将成为DDS阵列相位噪声的主要限制。对相位截断杂散的研究表明,至少在我们的系统中,相位截断杂散是不相关的,这与理论预测相反。我们认为这种解相关是由于DDS数组中存在一种无法识别的机制,而该机制在我们当前的操作DDS模型中无法解决。这种机制可能是由于FPGA中的某些计时元素所致,每次DDS阵列加电时,在通道之间的截断杂散的相对相位都会引起一些随机性。这种随机性消除了相位截断杂散,为使用DDS阵列提供SFDR增益提供了可能。对DDS阵列中量化噪声杂散的相关性的分析表明,几乎所有DAC输出位的值,每个DDS通道的总量化噪声功率都不相关。这表明对于N通道DDS阵列,SQNR中接近N的增益是可能的。对于其中量化噪声明显高于热噪声贡献的低位DAC,此增益将最为明显。最后,对量化器非线性杂散的相关性的测量结果表明,对于所有测试频率,二次谐波和三次谐波在整个通道之间高度相关。这意味着对于带内量化器非线性问题,没有使用DDS阵列的好处。结果,必须采用谐波杂散管理的替代方法。

著录项

  • 作者

    Comberiate Thomas M.;

  • 作者单位
  • 年度 2010
  • 总页数
  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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