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Numerical Modeling of Multi-Conductor Interconnects for High Speed Integrated Circuits

机译:高速集成电路多导体互连的数值模拟

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摘要

Presented here is an alternative methodology to the development of transmission line models for multi-conductor interconnects in high speed integrated circuits. The methodology starts with the assumption that per unit length (p.u.l.) transmission line parameters ??? i.e. p.u.l. resistance R, inductance L, capacitance C, and conductance G ??? have been extracted using a two-dimensional RLCG extractor. The methodology relies upon a rational fitting algorithm called VECTFIT to express the parameters as a rational function expression, a form suitable for equivalent circuit generation using a commercial circuit simulator like HSPICE. The methodology has been numerically verified and implemented in the form of some select interconnecting scenarios for typical on-chip applications. The new methodology has also been compared with the previous methodology for robustness, accuracy and computational efficacy.
机译:本文介绍的是用于高速集成电路中多导体互连的传输线模型开发的替代方法。该方法始于假设每单位长度(p.u.l.)传输线参数。即p.u.l.电阻R,电感L,电容C和电导G已使用二维RLCG提取器提取。该方法依赖于称为VECTFIT的有理拟合算法,将参数表示为有理函数表达式,这种形式适合使用诸如HSPICE的商用电路仿真器生成等效电路。该方法已通过数值验证,并以典型的片上应用的某些选定互连方案的形式实施。新方法也已与以前的方法进行了比较,以提高鲁棒性,准确性和计算效率。

著录项

  • 作者

    Sheikh Zuhaib B.;

  • 作者单位
  • 年度 2010
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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