首页> 美国政府科技报告 >Electron Lithography STAR Design Guidelines. Part 3: The Mosaic Transistor Array Applied to Custom Microprocessors. Part 4: Stores Logic Arrays, SLAS Implemented with Clocked CMOS
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Electron Lithography STAR Design Guidelines. Part 3: The Mosaic Transistor Array Applied to Custom Microprocessors. Part 4: Stores Logic Arrays, SLAS Implemented with Clocked CMOS

机译:电子光刻sTaR设计指南。第3部分:用于定制微处理器的马赛克晶体管阵列。第4部分:存储逻辑阵列,sLas用时钟CmOs实现

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The Mosaic Transistor Array is an extension of the STAR system developed by NASA which has dedicated field cells designed to be specifically used in semicustom microprocessor applications. The Sandia radiation hard bulk CMOS process is utilized in order to satisfy the requirements of space flights. A design philosophy is developed which utilizes the strengths and recognizes the weaknesses of the Sandia process. A style of circuitry is developed which incorporates the low power and high drive capability of CMOS. In addition the density achieved is better than that for classic CMOS, although not as good as for NMOS. The basic logic functions for a data path are designed with compatible interface to the STAR grid system. In this manner either random logic or PLA type structures can be utilized for the control logic.

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