Development of Cad Tools for Power Estimation in Continuous-Time and Switched-Capacitor Analog Circuits

摘要

The goal of this research contract was the development of CAD tools to compute statistical information (in particular, mean and variance) about the power dissipated in a continuous-time or switched-capacitor circuit, when statistical information about the input signals to the circuit is given. This approach mirrors the one generally used to estimate power dissipation in digital CMOS circuits. Two power estimation CAD programs were developed: one for continuous-time analog circuits, the other for switched-capacitor circuits. Those tools were integrated into an existing commercial CAD environment, namely CADENCE's Design Framework II.