首页> 美国政府科技报告 >CCD Long-Time Delay Line.
【24h】

CCD Long-Time Delay Line.

机译:CCD长时延线。

获取原文

摘要

A low-loss mode for operating CCDs is described that should lead to a decrease of the transfer losses in long CCD structures by more than two orders of magnitude. The analysis indicates that a buried-channel CCD operating in the low-loss mode should have an effective transfer loss of less than 10 to the -7th power per transfer. This report also describes the design of a low-loss CCD test chip containing 256- and 1024-stage, closed-loop CCDs. Operating as low-loss CCDs, these devices can store and recirculate 128 and 512 signal samples, respectively. The closed-loop CCD structures include a provision for adding input signal to the signal already present in the loop. In addition to the low-loss signal regeneration stages (one in the smaller loop and two in the larger loop), each closed-loop CCD also includes two floating-gate outputs for nondestructive output sensing, a floating-diffusion output for a destructive readout, and a dark-current subtraction stage. Also described in the report is the design of a programmable tester for operating the closed-loop CCDs on the low-loss CCD test chip. (Author)

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号