Electrical Characterization of Complex Memories. Part II. Assessment of a Circuit Implementation to Measure EPROM Data Storage Margins

摘要

This report describes work performed from June 1979 to February 1980 to assess the utility of an EPROM threshold margin measurement concept, which minimizes the need to guarantee long term data retention in EPROM in critical military applications. In this concept, special circuitry included on-chip allows a user to periodically measure, from normal external package pins, the programmed and erased threshold margins of every cell in the array. A device possessing this special mode in its entirety was not available. However, a single vendor did incorporate (for this and other purposes) a similar function in his 16K EPROM. While this device is useful as an evaluation tool, due to its inherent inability to measure the threshold of an erased cell, it is inadequate to rigorously validate the proposed concept. An electrical characterization and an analysis of the test mode circuitry was performed on the vendor's EPROM. Results indicated the concept should be feasible at the device level. Practicality in a system application can be realized but it will be dependent on the particular circuit implementation used. Consequently, IBM-FSD recommends further investigation of the threshold measurement concept, particularly in the area of E2PROMS due to their enhanced system applicability. (Author)