Functional Testing of LSI/VLSI (Very Large Scale Integration) Based Systems with Measure of Fault Coverage

摘要

Due to the advances in the integrated circuit (IC) technology, more and more components are being fabricated into a tiny IC chip. Since the number of pins on each chip is limited by the physical size of the chip, the problem of testing becomes more difficult than ever, especially in the VLSI (Very Large Scale Integration) chips. This problem is aggravated by the fact that, in nearly all cases, integrated circuit manufacturers are not willing to release the detailed circuit diagram of the IC chip to the users. Yet, as users of the IC chips, to make sure that the implemented system is reliable, we need to test the IC chips and the systems made of the interconnection of these chips. The purpose of this project is to find efficient algorithms for testing LSI/VLSI chips and LSI/VLSI-based systems. This report is organized into two chapters. Chapter 1 presents the state-of-the-art for the functional testing of LSI/VLSI devices with special emphasis on microprocessor testing. Chapter 2 reports our new research results. We present three algorithms to test the instruction decoding function of microprocessors.