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VHDL Register Transfer Level Model of the Linear Token Passing Multiplex Data BusProtocol for the High Speed Data Bus

机译:用于高速数据总线的线性令牌传递复用数据总线协议的VHDL寄存器传输级模型

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The research project abstract presented will describe the design process todevelop a partial simulatable specification model written in VHDL at the register transfer level to describe the linear token passing multiplex data bus protocol ('PROTOCOL') specification. The PROTOCOL is a distributed token passing computer protocol which operates over a dual redundant bus. The PROTOCOL is used as the communications standard to implement the high speed data bus (HSDB) module specification. The PROTOCOL and HSDB specifications are two of the pave pillar avionics architecture bus specifications being developed for the F-22, LHX, and future military aircraft. While this model does not implement the entire HSDB protocol specification, it does implement enough of the referenced specifications to give credence to the concept of hardware simulation modeling of avionics specifications. This concept is applicable for both military and commercial applications written in the VHDL language at a specification level of detail. VHDL RTL model, Simulatable Specifications High Speed Data Bus (HSDB) Jiawg/Pave Pillar Avionics.

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