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首页> 外文期刊>Molecular crystals and liquid crystals >Study on Address Discharge Characteristics Using Wall Charge on Three Electrodes during an Address Period in AC PDP
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Study on Address Discharge Characteristics Using Wall Charge on Three Electrodes during an Address Period in AC PDP

机译:AC PDP中在寻址期间使用三电极上的壁电荷进行寻址放电特性的研究

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摘要

A modified driving waveform in AC plasma display panel is proposed to improve the address discharge characteristics applying the additional pulses on the sustain electrode during an address period. After a reset period in the driving scheme of an AC PDP, the electrons are accumulated on two front electrodes and the ions are accumulated on the address electrode. Among the accumulated wall charge on three electrodes, the electrons on the scan electrode and the ions on the address electrode are mainly used for the address discharge triggering when the scan and address pulses are applied simultaneously during an address period. Meanwhile, since the constant bias voltage on the sustain electrode is only maintained during an address period, the wall charge on the sustain electrode a little contribute to an address discharge triggering. In this sense, if the electrons on the sustain electrode during an address period are utilized, the improvement of the address discharge characteristics is expected. Therefore, in this study, the additional negative going pulses are applied to the sustain electrode while the scan and address voltages are changed during an address period. In addition, the address discharge characteristics are investigated in accordance with the various voltage height and pulse applying time. Consequently, the production time of an address discharge can be reduced approximately 200ns under the optimal driving condition compared with the conventional driving waveform.
机译:提出了在AC等离子体显示面板中的修改的驱动波形,以在寻址周期期间在维持电极上施加附加脉冲来改善寻址放电特性。在AC PDP的驱动方案中的重置周期之后,电子在两个前电极上积累,离子在地址电极上积累。在三个电极上累积的壁电荷中,扫描电极上的电子和寻址电极上的离子主要用于在寻址期间同时施加扫描和寻址脉冲时触发寻址放电。同时,由于仅在寻址期间维持维持电极上的恒定偏置电压,因此维持电极上的壁电荷对寻址放电触发有一点贡献。从这个意义上讲,如果利用寻址期间中维持电极上的电子,则有望改善寻址放电特性。因此,在这项研究中,额外的负向脉冲被施加到维持电极,同时在寻址周期内扫描和寻址电压发生变化。另外,根据各种电压高度和脉冲施加时间研究寻址放电特性。因此,与常规驱动波形相比,在最佳驱动条件下,寻址放电的产生时间可以减少大约200ns。

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