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首页> 外文期刊>Electrochemical and solid-state letters >Pentacene-Thin Film Transistors with ZrO_2 Gate Dielectric Layers Deposited by Plasma-Enhanced Atomic Layer Deposition
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Pentacene-Thin Film Transistors with ZrO_2 Gate Dielectric Layers Deposited by Plasma-Enhanced Atomic Layer Deposition

机译:通过等离子体增强原子层沉积沉积的具有ZrO_2栅介电层的并五苯薄膜晶体管

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摘要

The effect of the dielectric constant and surface roughness of gate dielectrics on the electrical performance of pentacene-thin-film transistor (TFT) was investigated using high-K ZrO_2 films deposited by plasma-enhanced atomic layer deposition. The dielectric constant of ZrO_2 ( K ZrO_2) was in the range of 15.6-33.0, and the surface roughness was increased with K ZrO_2 in the presently reported devices. Threshold voltage and subthreshold swing were effectively reduced with increasing K ZrO_2 and were remarkably low, with values of -0.42 V and 0.15 V/dec, respectively, when K ZrO_2 = 33.0. To the contrary, the carrier mobility was determined by the surface roughness of ZrO_2 gate dielectrics.
机译:利用等离子增强原子层沉积高K ZrO_2薄膜研究了栅介电常数和栅极电介质表面粗糙度对并五苯薄膜晶体管(TFT)电性能的影响。 ZrO_2(K ZrO_2)的介电常数在15.6-33.0的范围内,并且在目前报道的器件中,表面粗糙度随K ZrO_2的增加而增加。当K ZrO_2 = 33.0时,阈值电压和亚阈值摆幅随着K ZrO_2的增加而有效降低,并且非常低,分别为-0.42 V和0.15 V / dec。相反,载流子迁移率由ZrO_2栅极电介质的表面粗糙度决定。

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