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首页> 外文期刊>Electrochemical and solid-state letters >Vertically and laterally self-aligned double layer of nanocrystals in nanopatterned dielectric layer for nanocrystal floating gate memory device
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Vertically and laterally self-aligned double layer of nanocrystals in nanopatterned dielectric layer for nanocrystal floating gate memory device

机译:用于纳米晶体浮栅存储器件的纳米图案化介电层中的纳米晶体的垂直和横向自对准双层纳米晶体

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摘要

The formation of a vertically and laterally self-aligned double layer of CdSe colloidal nanocrystals (NCs) in a nanopatterned dielectric layer on Si substrate was demonstrated by a repeating dip-coating process for NC deposition and atomic layer deposition (ALD) of _(Al2) O_3 layer. A nanopatterned SiO_2 /Si substrate was formed by patterning with a self-assembled diblock copolymer. After the selective deposition of the first NC layer inside the SiO2 nanopattern by dip-coating, an Al_2 O _3 interdielectric layer and the second NC layer in the Al_2 O_3 nanopattern were sequentially deposited. The capacitance-voltage measurement of an Al-gate/ALD- Al_2 O_3 (25 nm) /second-CdSe-NCs/ ALD-Al_2 O_3 (2 nm) /first-CdSe -NCsanopatterned- SiO_2 (15 nm) /p-Si substrate structure showed the flatband voltage shift through the charge transport between the gate and NCs.
机译:通过重复浸涂工艺对_(Al2 )O_3层。通过用自组装的二嵌段共聚物进行图案化来形成纳米图案化的SiO_2 / Si基板。在通过浸涂将第一NC层选择性沉积在SiO 2纳米图案内部之后,依次沉积Al_2O_3中间介电层和Al_2O_3纳米图案中的第二NC层。 Al-gate / ALD-Al_2 O_3(25 nm)/ second-CdSe-NCs / ALD-Al_2 O_3(2 nm)/ first-CdSe -NCs / nanopattered- SiO_2(15 nm)/ p的电容电压测量-Si衬底结构显示了通过栅极和NC之间的电荷传输实现的平带电压偏移。

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