Comparison of Off-Axis Electron Holography and Junction Staining of TEM Sections for Dopant Anomaly Visualization

摘要

Even after precise fault isolation, visualization of dopant-related anomalies in integrated circuits is extremely challenging. Usually, selective chemical staining techniques are used to delineate p-n junctions. However, junction staining can be inconsistent because of several variables (such as stain recipe, time, temperature, and light) that affect the chemical etch process. For failure analysis (FA) applications, staining must be performed after exposing the fail site by deprocessing or precise cross sectioning of the failing device. The differences between the state of the deprocessed or cross-sectioned dice, that is, uneven top-down deprocessing or other device components in the vicinity fail site, can also promote inconsistency. Staining procedures are also irreversible and sometimes destructive, which is not desirable in one-of-a-kind FA cases that require follow-up analysis.