A 10 GB/S EQUALIZER INTEGRATED CLOCK AND DATA RECOVERY FOR OPTICAL COMMUNICATION SYSTEMS

摘要

A 10 Gb/s analog continuous-time equalizer with integrated clock and data recovery circuit is presented. It is designed to recover signals degraded by chromatic and polarization mode dispersion. The key components in the design are a feedforward equalizer and a decision feedback equalizer, the parameters of which are electronically adjustable. Both circuit blocks are fully described and characterized with emphasis on minimizing self-induced distortion and maximizing high-speed performance. In addition to the equalizer and the clock and data recovery, the circuit also includes an integrated automatic gain control. The circuit is implemented in a commercial 0.18 μm SiGe BiCMOS technology and consumes 900 mW. The capacity of the equalizer to mitigate signal impairments is demonstrated using three electrically generated channels.