A Novel ATE (Additional Top-Electrode) Scheme for a 1.6 V FRAM Embedded Device at 180 nm Technology

摘要

We developed a 1.6 V FRAM embedded device by successfully implementing a 100 nm MOCVD-PZT capacitor with a SrRuO_3 electrode and a novel additional top electrode (ATE). ATE was used for preventing hydrogen-reduction damage or metal substance damage, arising from direct application of Al or W to top electrode. In spite of excellent reliability and wide sensing window of the memory, we found that there was a problem of lift-off of the ATE layer after full integration, leading to bit failure of the product. In order to eliminate the lift-off, we developed a new ATE scheme not only by using a compressive capping- oxide layer but by improving conformal deposition of ATE. The failed bits that appear as a tail of charge distribution were cleared even under a reliability test, a bake for 100 hours at 150 deg C. As a result, yield loss of the device was greatly reduced.