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A 40 MHz-BW 12-bit continuous-time a dagger I pound modulator with digital calibration and 84.2 dB-SFDR in 90 nm CMOS

机译:40 MHz-BW 12位连续时间匕首I磅调制器,具有数字校准功能,在90 nm CMOS中具有84.2 dB-SFDR

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摘要

A 4th-order 40 MHz-BW 12-bit continuous-time delta-sigma modulator with digital calibration is presented. A cost-efficient current-shaping technique for the SC DAC is proposed to relax the OTA slewing requirement. The DAC static and dynamic mismatches are eliminated by a look-up table based digital calibration. With a 1.2 V power supply and a 960 MHz clock, 73.6 dB peak SNR and 76.3 dB DR are measured for a 40 MHz bandwidth. After calibration, the modulator achieves an excellent SFDR of 84.2 dB and a 72.9 dB peak SNDR, with IM3 better than 85 dB. The modulator consumes 69.6 mW power, and occupies 0.28 mm(2) area in 90 nm CMOS.
机译:提出了一种具有数字校准功能的四阶40 MHz-BW 12位连续时间delta-sigma调制器。提出了一种具有成本效益的SC DAC电流整形技术,以放松OTA转换要求。通过基于查找表的数字校准消除了DAC的静态和动态失配。使用1.2 V电源和960 MHz时钟时,对于40 MHz带宽,测得的峰值SNR为73.6 dB,DR为76.3 dB。校准后,调制器可实现84.2 dB的出色SFDR和72.9 dB的峰值SNDR,IM3优于85 dB。该调制器消耗69.6 mW的功率,并在90 nm CMOS中占据0.28 mm(2)的面积。

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