CMOS Digital Time Amplifiers for High Resolution Timing Measurement

摘要

In this paper the concept of time amplification in the digital domain is introduced along with a simple CMOS implementation. The time amplifier is presented in the context of a high resolution time-to-digital converter. The issue of limited linearity of the time amplifier is addressed through the utilization of an efficient calibration technique that allows for the correction of such non-ideality. Experimental data validates the design of a resistively loaded time amplifier with a gain of 182 Second/Second. Also, simulations suggest that the time amplifier can be designed for gains up to a few thousands with input dynamic ranges in excess of a few hundred picoseconds. Also, some figures of merit and performance are introduced along with a discussion on some of the trade-offs involved in the design of a time amplifier.