A 25Gb/s Hybrid Integrated Silicon Photonic Transceiver in 28nm CMOS and SOI

摘要

We present a novel hybrid integrated electrical-optical (E-O) interface including a driver/TIA chip in 28nm CMOS and a modulator/PD chip in SOI, based on a mixed-pitch bumping technology. A pseudo-differential driver with pre-emphasis enables a carrier-injection ring modulator to operate at 25Gb/s with power efficiency of 2.9pJ/b. A TIA implements BW-enhancement techniques with a hybrid offset calibration, achieving 25Gb/s with power efficiency of 2.0pJ/b and a sensitivity of -8.0dBm OMA.