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Si-CMOS MMICs for 2.4-GHz wireless front-end applications

机译:的Si- CMOS 的MMIC 为 2.4GHz的 无线 前端应用

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摘要

This report describes the design and experimental results of a 1.8-V operation, Si-CMOS MMICs for 2.4-GHz-band short-range wireless front-end applications. These ICs contain a power amplifier (PA), a low-noise amplifier (LNA), and an antenna switch (SW), including almost all on-chip matching elements. The ICs were fabricated using a standard 0.18 μm bulk CMOS technology which has no extra process step to enhance RF performances and uses a low-resistivity substrate. In order to minimize the insertion loss of the SW and realize a higher gain of the PA and LNA, the gate-width for the SW was optimized and interdigital capacitors were applied to the PA and LNA. The performances of the fabricated ICs at 2.4 0Hz and 1.8 V are as follows: a 5-dBm transmit power, a 19-dB gain, an 18-mA operating current for the PA, a 1.5-dB insertion loss, more than 24-dB isolation, a power handling capability of 11 dBm for the SW, a 7.5-dB gain, a 4.5-dB noise figure, and an 8-mA operating current for the LNA.
机译:本报告描述了1.8V操作的设计和实验结果,SI-CMOS MMIC为2.4GHz带短路无线前端应用。这些IC包含功率放大器(PA),低噪声放大器(LNA)和天线开关(SW),包括几乎所有片上匹配元件。使用标准的0.18μm散装CMOS技术制造IC,其没有额外的工艺步骤来增强RF性能并使用低电阻率衬底。为了最小化SW的插入损耗并实现PA和LNA的更高增益,优化SW的栅极宽度,并且将叉指电容器施加到PA和LNA上。 2.4 0Hz和1.8V的制造IC的性能如下:5-DBM发射功率,19-DB增益,PA的18 mA工作电流,1.5 dB插入损耗,超过24 DB隔离,SW的电源处理能力为11 dBm,7.5 dB增益,4.5 dB噪声系数和LNA的8MA工作电流。

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