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Selective Passivation of GeO2/Ge Interface Defects in Atomic Layer Deposited High-k MOS Structures

机译:原子层沉积的高k MOS结构中GeO2 / Ge界面缺陷的选择性钝化

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Effective passivation of interface defects in high-k metal oxide/Ge gate stacks is a longstanding goal of research on germanium metal-oxide-semiconductor devices. In this paper, we use photoelectron spectroscopy to probe the formation of a GeO2 interface layer between an atomic layer deposited Al2O3 gate dielectric and a Ge(100) substrate during forming gas anneal (FGA). Capacitance- and conductance-voltage data were used to extract the interface trap density energy distribution. These results show selective passivation of interface traps with energies in the top half of the Ge band gap under annealing conditions that produce GeO2 interface layer growth. First-principles modeling of Ge/GeO2 and Ge/GeO/GeO2 structures and calculations of the resulting partial density of states (PDOS) are in good agreement with the experiment results.
机译:高k金属氧化物/ Ge栅堆叠中界面缺陷的有效钝化是锗金属氧化物半导体器件研究的长期目标。在本文中,我们使用光电子能谱探测形成气体退火(FGA)过程中原子层沉积的Al2O3栅极电介质和Ge(100)衬底之间GeO2界面层的形成。电容和电导电压数据用于提取界面陷阱密度能量分布。这些结果表明,在产生GeO2界面层生长的退火条件下,界面陷阱在Ge带隙的上半部具有能量的选择性钝化。 Ge / GeO2和Ge / GeO / GeO2结构的第一性原理模型以及所得的部分态密度(PDOS)的计算与实验结果非常吻合。

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