Network on Chip: A Framework for Routing in System on Chip

摘要

The technology scaling with modern application needs, lead to the development in System on Chip (SoC). As the number of SoC integration increases, the bus architecture finds difficulties in maintaining the performance of SoC. Hence, the conventional bus architecture is replaced by efficient Network on Chip (NoC) to improve the performances. The SoC can find its application in various fields such as multimedia processing, Ethernet, wireless LANs transporting TCP/IP, Internet, and HTTP, but, based on the application the performance need of SoC will vary. The SoC should support with high throughput in applications like Ethernet, whereas, it should support with lesser critical path delay in application like multimedia processing. This paper proposes an efficient application-aware routing algorithm for NoC that can switch between two applications based on the need of the end-user. The proposed NoC is evaluated in terms of Logic Elements (LE), static power, dynamic power, total power, targeted frequency, throughput and latency. The evaluated results justify that the proposed algorithm achieves a remarkable improvement, when compared to conventional LA-XYZ and XYZ routing algorithm.