首页> 外文期刊>Journal of computational and theoretical nanoscience >Design of New Reconfigurabie Architecture for Implementing a Least Mean Square Finite Impulse Response Filter Using Borrow Select Subtraction (BSLS)
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Design of New Reconfigurabie Architecture for Implementing a Least Mean Square Finite Impulse Response Filter Using Borrow Select Subtraction (BSLS)

机译:用于实现最小均线有限脉冲响应滤波器的新recrofurig架构的设计使用借用选择减法(BSL)

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摘要

A design of reconfigurable architecture of FIR filter has been implemented using a Least Mean Square (LMS) adaptive filter. LMS adaptive filter is mainly sued for reducing the coefficients of the filter. Generally, a LMS filter contains normal adder, subtractor, mixer and a delay part. Most of the concepts deal with an adder namely Full Adder (FA), Ripple Carry Adder (RCA), Carry Select Adder (CSLA), etc., Instead of using CSLA; Borrow Select Subtractor (BSLS) is used in LMS filter architecture. By using BSLA LMS adaptive filter in a reconfigurable FIR filter architecture in the proposed scheme, the area, power and delay will be reduced. The proposed scheme achieves better performance when compared to an existing scheme. The proposed method is implemented in ModeISim tool and efficiency has been calculated by using the device Virtex 6 Low Power in Xilinx ISE Design Suite 12.4.
机译:使用最小均方(LMS)自适应滤波器实现了FIR滤波器的可重新配置架构的设计。 LMS自适应滤波器主要适用于减少过滤器的系数。 通常,LMS滤波器包含普通加法器,减法器,混频器和延迟部分。 大多数概念处理加法器即完整加法器(FA),纹波携带加法器(RCA),携带选择加法器(CSLA)等,而不是使用CSLA; 借用选择减法器(BSL)用于LMS滤波器架构。 通过在所提出的方案中使用重新配置的FIR滤波器架构中的BSLA LMS自适应滤波器,将减少面积,电源和延迟。 与现有计划相比,拟议方案达到了更好的性能。 所提出的方法是在ModeIsim工具中实现的,并且通过使用Xilinx ISE设计套件12.4中的设备Virtex 6低功率计算了效率。

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