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Critical impact of gate dielectric interfaces on the trap states and cumulative charge of high-performance organic thin field transistors

机译:栅极介电接口对高性能有机薄场晶体管陷阱状态的临界影响和高性能有机薄型场晶体管的累积电荷

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摘要

In the operation of OFETs, the electrical properties are strongly dependent on the merits of the constituting layers and the formed interfaces. Here we study the trap states variations at the interface between the organic semiconductor pentacene and polymer insulators. With ZrO2 dielectric modified by polymers and find a 10 x decrease in the density of trap states at the semiconductor/insulator interface, bring about the charge carrier mobility increase from 0.058 cm(2)/Vs to 0.335 cm(2)/Vs. In addition, when compare to the thicker films at the same applied gate voltage, the thinner film would lead to enhanced coupling capability and more charges cumulative cumulated at the channel region, which is pivotal for optimizing the performance of OFETs. The results prove that the property of the insulator layer could impact largely on the device performance.
机译:在OFET的操作中,电性能强烈地取决于构成层和形成的接口的优点。 在这里,我们研究了有机半导体五烯和聚合物绝缘体之间的界面处的陷阱状态变化。 通过聚合物改性ZrO2电介质并发现半导体/绝缘体界面处的捕集状态密度降低10×,使电荷载流子迁移率从0.058cm(2)/ vs增加到0.335cm(2)/ vs。 另外,当与相同施加的栅极电压的较厚膜进行比较时,较薄的膜将导致增强的耦合能力和更多的电荷累积在沟道区的累积,这是用于优化OFET的性能的枢转。 结果证明了绝缘层的性质在很大程度上会影响器件性能。

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