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Influence of Mg ion concentration in ZrO2 gate dielectric layered silicon based MOS capacitors for memory applications: Thorough understanding of conduction processes

机译:Mg离子浓度在Zro2介电层叠硅基MOS电容中的影响:对传导过程的彻底理解

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Various high-K metal-oxide-semiconductor (MOS) capacitors with different concentrations of Mg doped ZrO2 (Mg:ZrO2) gate dielectric on p-type silicon (100) substrates were fabricated by using electron beam evaporation. A uniform and crack free dielectric layers of Mg:ZrO2 having RMS surface roughness in the range from 0.25 to 0.83 nm were achieved. The dielectric layers were structurally and electrically studied. Structural analysis from GIXRD and Williamson-Hall plots revealed that Mg incorporation into ZrO2 lattice has stabilized the tetragonal phase and the residual strain in the tetragonal stabilized Mg:ZrO2 layers had increased with increasing Mg concentration. Elemental composition studies of different layers in the MOS capacitors using Rutherford backscattering spectrometry (RBS) revealed the presence of very thin, unintentional and non-stoichiometric SiOx interfacial layer between dielectric and semiconductor interfaces. Thickness of the Mg:ZrO2 dielectric layers in the MOS capacitors measured by using RBS and cross-sectional field-emission scanning electron microscopy was in the range from 44.7 to 96.6 nm. A high dielectric constant of 29.8 with the equivalent oxide thickness of 6.5 nm was achieved in the 5 mol% Mg:ZrO2 dielectric layer. The hysteresis in the C-V characteristics of the MOS capacitors has been explained in detail based on the interactions of Mg ions with oxygen vacancies in the dielectric layer. Various conduction mechanisms have been elucidated to explain the leakage currents in the MOS capacitors. The decrease in Schottky and Poole-Frenkel barrier heights at the lower voltages (0 to - 3V) was found responsible for the increase in the leakage current as the Mg ion concentration was increased. Space charge limited conduction mechanism has been found to be dominant in larger applied voltage region (- 3V to -10V). The Fowler-Nordheim tunneling and trap-assisted tunneling were dominant at the higher negative voltage regions greater than -10V.
机译:通过使用电子束蒸发制造具有不同浓度的Mg掺杂ZrO2(Mg:ZrO2)栅极电介质的各种高k金属氧化物半导体(MOS)电容器。达到均匀且裂缝的自由介电层的Mg:ZrO 2的ZrO 2在0.25至0.83nm的范围内具有0.25至0.83nm的粗糙度。在结构上和电介质层进行结构和电介质。来自GixRD和Williamson-Hall图的结构分析显示,Mg掺入ZrO2晶格中已稳定四方相和四边形稳定的Mg中的残余菌株:ZrO2层随着Mg浓度的增加而增加。使用Rutherford反向散射光谱法(RBS)在MOS电容器中的不同层的元素组成研究揭示了电介质和半导体界面之间非常薄,无意和非化学计量的SiOx界面的存在。 MG的厚度:通过使用RB和横截面场 - 发射扫描电子显微镜测量的MOS电容器中的ZrO2电介质层的范围为44.7至96.6nm。在5mol%Mg:ZrO2介电层中,实现了等于6.5nm的等效氧化物厚度的高介电常数。已经基于Mg离子与介电层中的氧空位的相互作用详细说明了MOS电容器的C-V的特征中的滞后。已经阐明了各种传导机构以解释MOS电容器中的漏电流。发现较低电压(0至-3V)处的肖特基和普罗氏栅极屏障高度的减小,因为Mg离子浓度升高时,负责漏电流的增加。在较大施加的电压区域(-3V至-10V)中发现空间电荷有限的传导机制在较大施加的电压区域( - 3V至-10V)中占主导地位。 Fowler-Nordheim隧道和陷阱辅助隧道在大于-10V的较高负电压区域的主导地位。

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