An Approach to Design, Simulate & Synthesize Frequency Meter Using VLSI TECHNOLOGY

摘要

In this paper an approach is made to describe the designing, simulation & synthesis of frequency meter using VLSI technology. The realization of frequency meter ranging from 1 Hz to 30 MHz is done by using VHDL(Hardware Description Language)the synthesized design is implemented in FPGA by using XILINIX 4005. Hardware reduction, reprogrammability, RS-232C interface, single chip solution, high reliability, less weight, smaller size, calibration of number of parameters are the salient features of the equipment.