Analysis of MOS transistor behavior with Forward and Reverse Body biasing in Subthreshold region

摘要

All future vlsi circuits need to operate with ultra low power. Circuits operating with supply voltage as low as threshold voltage of MOS transistors. Subthreshold region offers energy efficient circuits but degrades the performance. Body biasing techniques made a comeback to have high speed and low power circuit operation in subthreshold region. Conventional CMOS itself is energy efficient with decreased performance at low supply voltages. Several body biasing methods exists in literature to improve performance Near/Below V_t supply voltages. In the paper MOS transistor characteristics are analyzed in subthresold region with different body biasing methods with Vdd=0.4v with PMOS and NMOS with 200nm, 400nm width respectively. Simulated using Cadence 45nm technology tool. Proposed new body biasing technique with fixed bias voltage between source and bulk which give better results than existing one.