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首页> 外文期刊>Analog Integrated Circuits and Signal Processing >A 0.2 pJ/step open loop VCO-based ADC with inverse R-2R preweighted linearization
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A 0.2 pJ/step open loop VCO-based ADC with inverse R-2R preweighted linearization

机译:一个0.2PJ /步骤开环VCO的ADC,具有逆向R-2R的抗潜力线性化

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摘要

An open loop analog-to-digital converter based on ring voltage-controlled oscillator (VCO-based ADC) is presented. By introducing the inverse R-2R pre-weighted front-end technique, the nonlinearities of the voltage to frequency conversion of the proposed VCO is kept less than 1% over rail-to-rail input swing. Unlike prior approaches, this proposed method does not suffer from any stability issues or feedback imperfections. A prototype was fabricated using TSMC 65 nm process. It occupies an actives area of 0.03 mm(2) and consumes as little as 3.1 mA from 1 V power supply. Measurement results of linearity indicate SFDR and SNDR of 77 and 66.7 dB, respectively, over 5 MHz passband bandwidth. This reveals energy less than 0.2 pJ/step.
机译:提出了一种基于环形电压控制振荡器(基于VCO的ADC)的开环模数转换器。 通过引入逆R-2R预加权前端技术,将所提出的VCO的频率转换的电压的非线性在轨到轨输入摆动上保持小于1%。 与现有方法不同,这种提出的方法不会遭受任何稳定性问题或反馈缺陷。 使用TSMC 65nm工艺制造原型。 它占据0.03mm(2)的活性面积,并且从1 V电源的耗电量小于3.1 mA。 线性度的测量结果分别显示出77和66.7 dB的SFDR和SNDR,超过5 MHz通带带宽。 这揭示了小于0.2 PJ /步骤的能量。

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